Current technology trends favor low power supply voltages and low power consumption circuits. A cascode structure is widely used in analog and mixed-signal circuits. FIG. 1a shows a cascode circuit formed by N CMOS transistors 2 while FIG. 1b a cascode circuit formed by N bipolar transistors 4. Note the vertical serial arrangement of the transistors 2, 4 and their connection to the power supply at VDD and ground. Obviously, the maximum drop across any individual transistor 2, 4 will be much less than the difference between VDD and ground, so the transistors 2, 4 are not really being effectively utilized.
Cascode topologies are popular. A typical cascode is an arrangement of electronic active devices that combines two or more amplifier stages for increased output resistance and reduced parasitic capacitance, resulting in high gain with increased bandwidth. The cascode arrangement usually refers specifically to the combination of a transconductance amplifier stage with a current buffer stage.
The minimum supply voltage (VDD in the embodiment of FIGS. 1a and 1b) for an N stage cascode structure is Nx(Vgs-Vth) for CMOS transistors and NxVBE(on) for bipolar transistors. This constraint severely limits the applications for these circuits in low power and voltage applications as there is not enough headroom for signal swing due to supply voltage constraints.
A prior art power amplifier is discussed with reference to FIGS. 6a-6c. Expensive HEMTs made from relatively exotic (compared to silicon) semiconductor materials have been used in the circuit of FIG. 6a to form a power amplifier such as can be used in the final RF stage of a telecommunications device. Exotic HEMT devices tend to need complicated power supplies since the voltage needed tends to be higher than that used elsewhere in communication equipment employing such devices.